Dokuz Eylül University Graduate School of Natural and Applied Sciences Fpga Based Smart Antenna Implementation

نویسندگان

  • Mustafa ALTINKAYA
  • Cahit HELVACI
چکیده

Adaptive beamformers for sensor arrays, are widely used in RADAR, SONAR and communications applications in order to increase the directivity of the sensor system to the target, while suppressing the interfering signals by adapting the radiation pattern of the antenna array. A signal processing hardware accomplishes the beamforming by adjusting the weights of the sensor array system. Eventhough the hardware for similar applications have been generally preferred as a Digital Signal Processor (DSP), Field Programmable Gate Arrays (FPGA), have become a promising alternative, for various signal processing technics, with increasing logic elements they include. In this manner, logic elements included in the FPGA can be arranged as distinct processors running concurrently, therefore signal processing algorithms running on distinct processors can be implemented by employing FPGA technology. Systolic arrays are processor arrays, that operate concurrently and pass data between the neighbor processors in order to perform complex functions. Optimal weight extraction based on systolic structures have been the subject of various researches for nearly two decades. In this thesis we propose a rectangular systolic structure for QR decomposition based recursive least squares algorithm for a minimum variance distortionless response beamformer and a folding scheme for this systolic structure. Folding a systolic array reduces the die size of the hardware implementation, accordingly systolic arrays for larger sensor systems will be able to be implemented without employing a larger FPGA chip. In this thesis, the SystemC library is preferred for developing the necessary software and for the implementation of the algorithm on the hardware. The SystemC is accepted by IEEE as a standard for system development and simulation in 2006. The proposed systolic structure is then implemented on a FPGA based DSP Development board and the results are compared with the conventional systolic array based beamformer hardware. This method can be applied to sensor array beamforming application.

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تاریخ انتشار 2007